The right PLL can make the design of the clocking system easier and more robust by providing flexible clock multiplication capability and multiple phase-locked outputs at different frequencies or at different precise fractional phase offsets of the clock period. TCI PLLs provide these features to minimize system integration effort.

The wrong PLL can impede chip bring-up and production ramp by requiring lab work to discover process-dependent tweaking factors necessary to make the PLL operate as specified. TCI PLLs are designed to operate optimally under all process and environmental conditions with no adjustments.