Anyone can deliver wonderful things in the distant future. You, however, have to deliver on a schedule. Every risk your project takes endangers that schedule.

Your complex system-on-a-chip may have just one or two clocks, or it may have a dozen. In most systems, every one of these clocks is derived from one or more phase-locked loops. Timing jitter from these PLLs shows up on every timing path in your design, and in every AC spec you promise to your customers. You owe your customers and your engineers the finest PLLs available.