"The increasing demand for performance-intensive handheld devices and rising time-to-market pressures heightens the need for design turnkey providers to endow ASIC customers with more predictable and robust SoC solutions. With True Circuits' PLL and DLL at TSMC 55nm, we were able to achieve low jitter for DDR 800Mbps and enter into mass production with very stable yield."

Yao Lee
Strategic Marketing Manager
Alchip Technologies



We provide all of the following for each of our PLLs:

  • Complete specifications
  • User guidelines
  • Behavioral simulation model
  • Complete layout (GDSII)
  • Layout vs. schematic netlist
  • ...


14 Jun 17 True Circuits Attends Design Automation Conference

14 Mar 17 True Circuits Showcases State-of-the-art PLLs and 16nm IP

30 May 16 True Circuits Attends Design Automation Conference

14 Mar 16 True Circuits Announces New Line of IoT PLLs

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