"We selected True Circuits because of their deep expertise and proven ability in high-performance timing circuits. Using their programmable IP, our team was able to implement multiple PLL and DLL blocks under an aggressive schedule to provide our customers with complete timing flexibility for even the most demanding system applications."

Stefan Tamme, Vice President of Sales and Marketing, Leopard Logic



A TCI deskew PLL, which provides phase-aligned divide by 1, 2, and 4 clock outputs, can facilitate generating the system clock signals, data strobes, and internal double frequency clocks used to clock the output data. Spread-spectrum PLLs can also be used to generate the system clock to lower EMI emissions.


21 Jul 09 True Circuits Attends Design Automation Conference

06 Apr 09 True Circuits 40nm PLL and DLL Hard Macros Featured at TSMC Technology Symposium in San Jose

15 Jan 09 See Our Product Showcase in the Jan-Feb Issue of Chip Design

22 Sep 08 True Circuits Analog PLL & DLL Hard Macros Featured at GSA Suppliers Expo

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