"We selected TCI's clock generator PLL because of its small size, wide frequency range and superior low-jitter performance. This will enable our ASIC customers to successfully implement multiple SPI-4.2 macros in their high-end telecommunication ASICs and help meet the tight jitter and power budgets required for 10 Gbps SONET/SDH systems."

Hideya Horikawa
Senior Design Engineering Manager
Renesas



Our standard licensing agreement does not permit the re-sale of a TCI PLL. However, such terms are available for additional fees.


1 Jun 21 TSMC NA Technology Symposium
Virtual Event

2 Jun 21 TSMC Europe Technology Symposium
Virtual Event

2 Jun 21 TSMC Taiwan Technology Symposium
Virtual Event

2 Jun 21 TSMC Japan Technology Symposium
Virtual Event

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