"Our mission is to provide predictable, reliable and cost-effective ASIC solutions, while reducing risk at each step of the process and improving time-to-market. True Circuits PLLs and DLLs are feature rich, easily integrated and well supported, helping us to deliver quality analog IP and faster design implementations to our ASIC customers."

Hans Bouwmeester
Director of IP
Open-Silicon

The Verilog model is very close but not perfect.

• In steady state, the Verilog model does not model any jitter that might be present in the real PLL.
• During startup, the Verilog model will achieve lock much more quickly than the actual PLL....
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