"With True Circuits' silicon-proven PLLs and DLLs in our industry-leading design portfolio and flow, our ASIC customers benefit with exceptional performance and reliability. Combined with our custom chip design expertise, these hard macros enable us to quickly and cost-effectively implement ASIC designs with analog components for high-volume applications."

Prasad Subramaniam
Vice President Design Technology
eSilicon

A TCI deskew PLL, which provides phase-aligned divide by 1, 2, and 4 clock outputs, can facilitate generating the system clock signals, data strobes, and internal double frequency clocks used to clock the output data. Spread-spectrum PLLs can also be used to generate the system clock to lower EMI emissions.