"Over the last nine years, ARM has used a variety of high performance PLLs from True Circuits in test and development systems to showcase the performance and flexibility of our flagship processor products. We have now extended the list of processors to include the ARM Cortex-A family of applications processors, including the scalable Cortex-A9 hard core in TSMC¹s 40nm G process. TCI's wide range, low-jitter PLLs enable us to demonstrate the speed and functionality of ARM cores and enable our silicon and software partners to optimize and accelerate their own development on advanced Cortex-A platforms."

Peter Hutton
VP Technology & Systems
Processor Division, ARM

The cycle-to-cycle jitter for a divided output clock is the same percentage of the divided clock period as that for an undivided clock in the worst case of low-frequency supply/substrate noise. However, the cycle-to-cycle jitter for any divided clock expressed in units of time cannot exceed twice the long-term jitter by their definitions.